Energy Efficient Arithmetic Logic Unit (ALU) Based On Dynamic Voltage and Frequency Scaling (DVFS)
Keywords:System Performance, power saving technique, energy and power reduction
This project presents a design of 8-bit Arithmetic Logic Unit (ALU) with eight different operations. ALU is the most crucial parts in digital computer which is designed to compute all the arithmetic and logic operations, including decoding operations that need to be done for almost any data that is being processed by the central processing unit (CPU). In the applications of digital circuits, there are some important attributes that need to be considered such as maximizing speed and minimizing power consumption. Higher power consumption results in more heat dissipation, higher cooling cost and make the system more prone to failures and malfunctions. However, low power consumption literally can reduce problems related to heat and also reduced the performance of the system. Therefore, this project will cover in designing 8-bit ALU with eight operations by using Intel Quartus Prime Development Suite. Next, determining optimize voltage and frequency by using Maplesoft Maple. Verifying the functionality and performance of ALU that implement DVFS technique and optimizing the performance of ALU in term of frequency, timing, and power by maximize power saving. This project will focus on three conditions which are high performance, optimized, and low performance test. The integrations of all sub-modules will create an efficient and effective solutions for ALU design. The generated graph from Maple proves the DVFS technique. DVFS technique improved by 25% from the conventional technique in term of timing performance.