Performance Evaluation of Three-Phase Multilevel Inverter with R-Load using SPWM

Abstract

This project focuses on the design and performance evaluation of a three-phase symmetric multilevel inverter using Sinusoidal Pulse Width Modulation (SPWM) and an RL load. The system is developed and simulated using PLECS software with a maximum DC input of 1000 VDC and a load resistance of 10 Ω. To improve output waveform quality and meet Malaysian power standards, an LC filter is designed using a 4.7 µF capacitor and a 5.4 mH inductor, achieving a cutoff frequency of 1000 Hz. The analysis confirms that the Total Harmonic Distortion (THD) of the output voltage is reduced from approximately 68 % to below 1.5%, demonstrating the filter's effectiveness and the inverter’s suitability for clean power delivery. This result confirms that the proposed design effectively meets the power quality standards with a low-distortion sinusoidal output.