Booth Algorithm with Implementation of UART Module using FPGA


  • Abd Kadir Mahamad Universiti Tun Hussein Onn Malaysia
  • Azmi Sidek Universiti Tun Hussein Onn Malaysia
  • Sharifah Saon Universiti Tun Hussein Onn Malaysia
  • Kenneth Wong Fatt Kong Iconix Consulting Sdn Bhd
  • Iqbal A. Khan Umm Al-Qura University


FPGA, Booth multiplier, UART, VHDL, GUI


FPGA gives high level of flexibility to the user to rapidly construct and test any hardware. It has a lot of gates which are used depending upon the hardware to be implemented. These project aims at designing Booth multiplier using VHDL for signed bit multiplication in FPGA for high speed operations, developed and implemented of UART module required to enable two-way communication between the DE-2 board and computer. It is also designed GUI interface using MATLAB for sending data and enable the output of the process result to be displayed. The Booth multiplier was implemented using the algorithm in both signed and unsigned number and the input and output of the multiplication was successfully achieved and confirmed through simulation. The GUI was implemented and tested, which UART module also performed well for transmitting and receiving of 8-bit width data. In general, the objective of this project was successfully achieved, which, the result of the component part were able to be tested.


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How to Cite

Mahamad, A. K. ., Sidek, A. ., Saon, S. ., Kong, K. W. F. ., & A. Khan, I. . (2020). Booth Algorithm with Implementation of UART Module using FPGA. International Journal of Integrated Engineering, 12(2), 151–158. Retrieved from

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